From 8a979b5e5cf9420f46303daa71e93db11bcebf34 Mon Sep 17 00:00:00 2001
From: zhangfuxin <fxzhang@ict.ac.cn>
Date: Sun, 20 Nov 2022 08:03:46 +0000
Subject: [PATCH] revise do-while assembly to make it clearer

Thanks to @3p1phany, solves #33
---
 materials/chapter2/loop.S | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/materials/chapter2/loop.S b/materials/chapter2/loop.S
index 4a7ba2f..aa19a69 100644
--- a/materials/chapter2/loop.S
+++ b/materials/chapter2/loop.S
@@ -23,16 +23,15 @@ test_while:
 	addi.w	$t0,$t0,1
 	b		.L2
 
-
 test_dowhile:
-	or		$t0,$r0,$r0 
-	or		$t3,$r0,$r0
-.L2:
-	add.w	$t1,$t3,$t0
-	addi.w	$t2,$t0,1
-	or		$t3,$t1,$r0
-	or		$t0,$t2,$r0
-	blt		$t2,$a0,.L2
-	or		$a0,$t1,$r0
-	jr		$ra
-
+	// a   : $a0
+	// sum : $t0
+	// i   : $t1
+	or      $t0,$r0,$r0
+	or      $t1,$r0,$r0
+.L1:
+	add.w   $t0,$t0,$t1
+	addi.w  $t1,$t1,1
+	blt     $t1,$a0,.L1
+	or      $a0,$t1,$r0
+	jr      $ra