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Fix: Used but undeclared macro 'asm!'.

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This commit is contained in:
Yakkhini
2022-07-10 02:14:12 +08:00
parent 538b0448eb
commit ae5a446f41
3 changed files with 11 additions and 11 deletions
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8
ci-user/riscv/src/asm.rs
View File

@@ -7,7 +7,7 @@ macro_rules! instruction {
pub unsafe fn $fnname() {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!($asm),
() => core::arch::asm!($asm),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {
@@ -58,7 +58,7 @@ instruction!(
pub unsafe fn sfence_vma(asid: usize, addr: usize) {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("sfence.vma {0}, {1}", in(reg) asid, in(reg) addr),
() => core::arch::asm!("sfence.vma {0}, {1}", in(reg) asid, in(reg) addr),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {
@@ -87,7 +87,7 @@ mod hypervisor_extension {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
// Since LLVM does not recognize the two registers, we assume they are placed in a0 and a1, correspondingly.
() => asm!($asm, in("x10") rs1, in("x11") rs2),
() => core::arch::asm!($asm, in("x10") rs1, in("x11") rs2),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {
@@ -112,7 +112,7 @@ mod hypervisor_extension {
#[cfg(all(riscv, feature = "inline-asm"))]
() => {
let mut result : usize;
asm!($asm, inlateout("x10") rs1 => result);
core::arch::asm!($asm, inlateout("x10") rs1 => result);
return result;
}

2
ci-user/riscv/src/lib.rs
View File

@@ -14,7 +14,7 @@
//! - Wrappers around assembly instructions like `WFI`.
#![no_std]
#![cfg_attr(feature = "inline-asm", feature(asm))]
#![cfg_attr(feature = "inline-asm", feature(asm_const))]
extern crate bare_metal;
#[macro_use]
extern crate bitflags;

12
ci-user/riscv/src/register/macros.rs
View File

@@ -7,7 +7,7 @@ macro_rules! read_csr {
#[cfg(all(riscv, feature = "inline-asm"))]
() => {
let r: usize;
asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
core::arch::asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
r
}
@@ -36,7 +36,7 @@ macro_rules! read_csr_rv32 {
#[cfg(all(riscv32, feature = "inline-asm"))]
() => {
let r: usize;
asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
core::arch::asm!("csrrs {0}, {1}, x0", out(reg) r, const $csr_number);
r
}
@@ -102,7 +102,7 @@ macro_rules! write_csr {
unsafe fn _write(bits: usize) {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
() => core::arch::asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {
@@ -128,7 +128,7 @@ macro_rules! write_csr_rv32 {
unsafe fn _write(bits: usize) {
match () {
#[cfg(all(riscv32, feature = "inline-asm"))]
() => asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
() => core::arch::asm!("csrrw x0, {1}, {0}", in(reg) bits, const $csr_number),
#[cfg(all(riscv32, not(feature = "inline-asm")))]
() => {
@@ -178,7 +178,7 @@ macro_rules! set {
unsafe fn _set(bits: usize) {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrs x0, {1}, {0}", in(reg) bits, const $csr_number),
() => core::arch::asm!("csrrs x0, {1}, {0}", in(reg) bits, const $csr_number),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {
@@ -204,7 +204,7 @@ macro_rules! clear {
unsafe fn _clear(bits: usize) {
match () {
#[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrc x0, {1}, {0}", in(reg) bits, const $csr_number),
() => core::arch::asm!("csrrc x0, {1}, {0}", in(reg) bits, const $csr_number),
#[cfg(all(riscv, not(feature = "inline-asm")))]
() => {