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revise do-while assembly to make it clearer

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Thanks to @3p1phany, solves #33
This commit is contained in:
zhangfuxin
2022-11-20 08:03:46 +00:00
parent 11298b65f4
commit 8a979b5e5c
1 changed files with 11 additions and 12 deletions
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23
materials/chapter2/loop.S
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@@ -23,16 +23,15 @@ test_while:
addi.w $t0,$t0,1
b .L2
test_dowhile:
or $t0,$r0,$r0
or $t3,$r0,$r0
.L2:
add.w $t1,$t3,$t0
addi.w $t2,$t0,1
or $t3,$t1,$r0
or $t0,$t2,$r0
blt $t2,$a0,.L2
or $a0,$t1,$r0
jr $ra
// a : $a0
// sum : $t0
// i : $t1
or $t0,$r0,$r0
or $t1,$r0,$r0
.L1:
add.w $t0,$t0,$t1
addi.w $t1,$t1,1
blt $t1,$a0,.L1
or $a0,$t1,$r0
jr $ra